1. Field of the Invention
The present invention related to a system in package, and more particularly to more than once reflow processes is performed to prevent the circuit short from the deformation of the conductive elements before the package structure is accomplished.
2. Description of the Prior Art
Miniaturized semiconductor dice has been a trend for its various functions. These semiconductor dices should be provided with more and more I/O pads within a smaller region, thus the density of metal pins will raises as well. Therefore, the early package technology of lead frame is not suitable for the high density metal pins, also has been replaced by the technology of ball grid array (BGA). It is advantageous for BGA to provide more compact density and to have the solder balls, less subject to damage and distorted.
With 3C products in fashion, such as cell phone, PDA or iPod, these 3C products are equipped with at least one systemic die within a smaller volume. A wafer level package (WLP) has been developed to packaging a wafer before sawing. U.S. Pat. No. 5,323,051 discloses one kind of wafer level package. However, for WLP, the increasing number and the reduced pitches of the bonding pads result in signal coupling and noise. In addition, the reliability of package may be reduced because of the reduced pitches. Thus, WLP aforementioned may not satisfy the design of smaller dices.
In addition, assembling several ICs required by a system in a single package is now a common practice for complex electronic systems, and is often referred to as a SIP (System in Package). Using a SIP assembly will result in the improved performance, less cost, and reduced size or dimension for an electronic system. Early SIP technology was based on wire bond structure or dies. However, as the number of different ICs in an electronic system increased or became more complex, the large number of wire bonds is almost unmanageable, and, making hundreds of closely spaced wire bond connections is very difficult. Furthermore, such complex wire bond arrangements are prone to breaks and/or shorts between wire bonds.
Therefore, in order to solve the problem which is introduced by wire bonding process, the present invention provide a die that is formed on substrate by using the flip-chip technology, and more than once reflow process is performed to ensure the connection between the die and the substrate, so as to maintain the integrity of the semiconductor device.